AI hardware · Layer
Supply constraints and bottlenecks
AI hardware is a chain of dependent steps, and the slowest link sets the pace. Understanding where the binding constraints sit explains why compute is scarce even when one input is plentiful.
Key facts
- The recurring chokepoints are HBM, advanced packaging (CoWoS-class), and grid power, more than raw wafer capacity.
- Each chokepoint has long lead times to expand, so shortages persist for quarters or years, not weeks.
- Concentration compounds scarcity: leading-edge fabrication, EUV, and HBM each rest on very few suppliers.
- Export controls add a policy layer on top of the physical chain, restricting where the most advanced hardware can go.
Where it bottlenecks
The binding constraint rotates between HBM, packaging, and power; relieving one often just exposes the next.
Who dominates it
TSMCSK HynixASMLNVIDIA
Companies in this layer
KLA Corporation
USADelivers inspection and metrology equipment for semiconductor manufacturing
Lam Research
USAProvides deposition, etch, and process tools for semiconductor manufacturing
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